MOS Circuits Area Capacitance and Delay Unit

Question 1
Marks : +2 | -2
Pass Ratio : 100%
Which of the following mainly constitutes the output node capacitance?
Inter electrode capacitance
Stray capacitance
Junction Parasitic capacitance
All of the mentioned
Explanation:
Output node capacitance mainly consists of junction parasitic capacitance.
Question 2
Marks : +2 | -2
Pass Ratio : 100%
The interconnect capacitance is formed by __________
Area between the interconnect lines
Interconnect lines between the gates
Inter electrode capacitance of interconnect lines
None of the mentioned
Explanation:
Interconnect line between the gates form interconnect capacitance.
Question 3
Marks : +2 | -2
Pass Ratio : 100%
The dominant component of the total output capacitance in submicron technology is?
Drain diffusion capacitance
Gate oxide capacitance
Interconnect capacitance
Junction parasitic capacitance
Explanation:
Interconnect capacitance becomes dominant component in submicron technology.
Question 4
Marks : +2 | -2
Pass Ratio : 100%
Zero bias depletion capacitance per unit length at sidewall junctions is given by, (Cj is the zero bias depletion capacitance per unit area).
(√10).Cj.xj
(√5).Cj.xj
(√10).Cj.xj2
(√10).Cj.xj3
Explanation:
Since the doping concentration is 10 times larger.
Question 5
Marks : +2 | -2
Pass Ratio : 100%
The junction parasitic capacitance are produced due to ____________
Source diffusion regions
Gate diffusion regions
Drain diffusion region
All of the mentioned
Explanation:
The junction parasitic capacitance are produced due to drain diffusion capacitance.
Question 6
Marks : +2 | -2
Pass Ratio : 100%
Which of the following is dominant component in input capacitance?
Gate diffusion capacitance
Gate parasitic capacitance
Gate oxide capacitance
All of the mentioned
Explanation:
For input capacitance, gate oxide capacitance is the main component.
Question 7
Marks : +2 | -2
Pass Ratio : 100%
The total load capacitance is calculated as the sum of __________
Drain capacitance in series with input capacitance
Drain capacitance + interconnect capacitance +input capacitance
Drain capacitance + interconnect capacitance – input capacitance
Drain capacitance in parallel with input capacitance
Explanation:
Total load capacitance = Drain capacitance + interconnect capacitance +input capacitance.
Question 8
Marks : +2 | -2
Pass Ratio : 100%
By what amount is Sidewall doping larger than substrate doping concentration.
5
2
1
10
Explanation:
The sidewall doping is 10 times larger.
Question 9
Marks : +2 | -2
Pass Ratio : 100%
The amount of gate oxide capacitance is determined by __________
Charges present on the gate
Polarity of the gate
Charges present on the substrate
Area of the gate
Explanation:
The amount of gate oxide capacitance is determined by the area of the gate.
Question 10
Marks : +2 | -2
Pass Ratio : 100%
The amount of parasitic capacitance at the output node is determined by __________
Concentration of the impurity doped
Size of the total drain diffusion area
Charges stored in the capacitor
None of the mentioned
Explanation:
The amount of parasitic capacitance is a linear function of drain diffusion area.