Let the mantissa be represented by 23 bits plus a sign bit and let the exponent be represented by 7 bits plus a sign bit.

The truncation error for the sign magnitude representation is symmetric about zero and falls in the range

According to the IEEE 754 standard, for a 32-bit machine, single precision floating point number is represented as X=(-1)s.2E-127(M).

(101.01)2=1*22+0*21+1*20+0*2-1+1*2-2=(5.25)10

A real number X can be represented as X=\\(\\sum_{i=-A}^B b_i r^{-i}\\) where bi represents the digit, ‘r’ is the radix or base, A is the number of integer digits, and B is the number of fractional digits.

The ones complement of (1100)2 is (0011)2. Thus the two complement of this number is obtained as (0011)2+(0001)2=(0100)2.

In floating point representation, the mantissa is either rounded or truncated. Due to non-uniform resolution, the corresponding error in a floating point representation is proportional to the number being quantized.

According to the IEEE 754 standard, for a 32-bit machine, single precision floating point number is represented as X=(-1)s.2E-127(M).

Let us consider two numbers X=M.2E and Y=N.2F

For a two’s complement representation, the truncation error is always negative and falls in the range