Introduction to Hardware Description Language

Question 1
Marks : +2 | -2
Pass Ratio : 50%
The use of VHDL can be done in _____ ways.
2
3
4
5
Explanation:
The VHDL has three coding styles are: (i) data flow, (ii) structural, (iii) behavioural.
Question 2
Marks : +2 | -2
Pass Ratio : 50%
The output frequency related to the sampling interval of a frequency counter as _____________
Directly with the sampling interval
Inversely with the sampling interval
More precision with longer sampling interval
Less precision with longer sampling interval
Explanation:
Sampling interval means a particular frequency range in which the device operates correctly. Thus, more precision is produced with longer sampling interval.
Question 3
Marks : +2 | -2
Pass Ratio : 50%
What does the data signal do in the keypad application?
The row and column encoded data
The ring encoded data
The freeze locator data
The ring counter data
Explanation:
The data signal arranges the information with the help of data flow in row and column manner. It encodes the data to be sent.
Question 4
Marks : +2 | -2
Pass Ratio : 50%
The full form of VHDL is _____________
Very High Descriptive Language
Verilog Hardware Description Language
Variable Definition Language
None of the Mentioned
Explanation:
The full form of VHDL is Verilog Hardware Description Language.
Question 5
Marks : +2 | -2
Pass Ratio : 50%
In a digital clock application, the basic frequency must be divided down as _____________
1 Hz
60 Hz
100 Hz
1000 Hz
Explanation:
Minimum count is 1 sec and time = 1/freq. So, t = 1/1 = 1Hz.
Question 6
Marks : +2 | -2
Pass Ratio : 50%
At high frequencies when the sampling interval is too long in a frequency counter _____________
The counter works fine
The counter undercounts the frequency
The measurement is less precise
The counter overflows
Explanation:
Let the sampling time be 1 sec. This means the counter will count the number of pulses from the unknown signal for 1sec duration and would display it after 1 sec. thus if the signal is of 800 Hz, at the end of 1 sec, counter would have counted up to 800. Thus, in case of high frequencies and high sampling time, counter might count beyond its limit and overflows.
Question 7
Marks : +2 | -2
Pass Ratio : 50%
The full form of HDL is _________________
Higher Descriptive Language
Higher Definition Language
Hardware Description Language
High Descriptive Language
Explanation:
The full form of HDL is Hardware Description Language.
Question 8
Marks : +2 | -2
Pass Ratio : 50%
VHSIC stands for _____________
Very High Speed Integrated Circuits
Very Higher Speed Integration Circuits
Variable High Speed Integrated Circuits
Variable Higher Speed Integration Circuits
Explanation:
VHSIC stands for Very High Speed Integrated Circuits.
Question 9
Marks : +2 | -2
Pass Ratio : 50%
VHDL is being used for _____________
Documentation
Verification
Synthesis of large digital design
All of the Mentioned
Explanation:
The full form of VHDL is Verilog Hardware Description Language. The acronym of VHDL itself captures the entire theme of the language and it describes the hardware in the same manner as does the schematic. So, it is used as documentation, verification and synthesis of large digital designs.
Question 10
Marks : +2 | -2
Pass Ratio : 50%
In an HDL application of a stepper motor, what is done next after an up/down counter is built?
Build the sequencer
Test it on a simulator
Test the decoder
Design an intermediate integer variable
Explanation:
Simulator is a software which is used in the testing of the stepper motor using up/down counter.