Computer Organization

Address Translation

Question 1
Marks : +2 | -2
Pass Ratio : 100%
The area in the main memory that can hold one page is called as ___________
Page entry
Page frame
Frame
Block
Explanation:
None.
Question 2
Marks : +2 | -2
Pass Ratio : 100%
The virtual memory bridges the size and speed gap between __________ and __________
RAM and ROM
RAM and Secondary memory
Processor and RAM
None of the mentioned
Explanation:
The virtual memory basically works as an extension of the RAM.
Question 3
Marks : +2 | -2
Pass Ratio : 100%
The TLB is incorporated as part of the _________
Processor
MMU
Disk
RAM
Explanation:
None.
Question 4
Marks : +2 | -2
Pass Ratio : 50%
The general purpose registers are combined into a block called as ______
Register bank
Register Case
Register file
None of the mentioned
Explanation:
To make the access of the registers easier, we classify them into register files.
Question 5
Marks : +2 | -2
Pass Ratio : 50%
The page length shouldn’t be too long because ___________
It reduces the program efficiency
It increases the access time
It leads to wastage of memory
None of the mentioned
Explanation:
If the size is more than the required size then the extra space gets wasted.
Question 6
Marks : +2 | -2
Pass Ratio : 100%
Whenever a request to the page that is not present in the main memory is accessed ______ is triggered.
Interrupt
Request
Page fault
None of the mentioned
Explanation:
When a page fault is triggered, the os brings the required page into memory.
Question 7
Marks : +2 | -2
Pass Ratio : 100%
If the page table is large then it is stored in __________
Processor
Main memory
Disk
Secondary storage
Explanation:
By storing the table on the RAM the required operation’s speed is increased.
Question 8
Marks : +2 | -2
Pass Ratio : 100%
What does the RUN signal do?
It causes the termination of a signal
It causes a particular signal to perform its operation
It causes a particular signal to end
It increments the step counter by one
Explanation:
The RUN signal increments the step counter by one for each clock cycle.
Question 9
Marks : +2 | -2
Pass Ratio : 50%
The lower order bits of the virtual address forms the __________
Page number
Frame number
Block number
Offset
Explanation:
This gives the offset within the page table.
Question 10
Marks : +2 | -2
Pass Ratio : 100%
The page table should be ideally situated within ____________
Processor
TLB
MMU
Cache
Explanation:
The page table information is used for every read and access operation.