Compilers

Symbol Table Organization

Question 1
Marks : +2 | -2
Pass Ratio : 100%
Virtual memory consists of _________
Static RAM
Dynamic RAM
Magnetic memory
None of the mentioned
Explanation:
It does consist of static RAM.
Question 2
Marks : +2 | -2
Pass Ratio : 100%
Von Neumann architecture is __________
SISD
SIMD
MIMD
MISD
Explanation:
It is single instruction single data.
Question 3
Marks : +2 | -2
Pass Ratio : 100%
Cache memory acts between __________
CPU and RAM
RAM and ROM
CPU and Hard Disk
None of the mentioned
Explanation:
It acts between CPU and RAM.
Question 4
Marks : +2 | -2
Pass Ratio : 100%
In a program using subroutine call instruction, it is necessary ___________
Initialize program counter
Clear the accumulator
Reset the microprocessor
Clear the instruction register
Explanation:
It is mandatory to clear the instruction register.
Question 5
Marks : +2 | -2
Pass Ratio : 100%
Logic X-OR operation of (4ACO) H & (B53F) H results __________
AACB
0000
FFFF
ABCD
Explanation:
Xoring the two operands we get FFFF.
Question 6
Marks : +2 | -2
Pass Ratio : 100%
The circuit used to store one bit of data is known as __________
Encoder
OR gate
Flip Flop
Decoder
Explanation:
Flip flop is 1 bit circuit.
Question 7
Marks : +2 | -2
Pass Ratio : 100%
A Stack-organised Computer uses instruction of __________
Indirect addressing
Two-addressing
Zero addressing
Index addressing
Explanation:
Zero addressing modes are used in stack organised computer.
Question 8
Marks : +2 | -2
Pass Ratio : 100%
An n-bit microprocessor has __________
n-bit program counter
n-bit address register
n-bit ALU
n-bit instruction register
Explanation:
N bit microprocessor has bit instruction register.
Question 9
Marks : +2 | -2
Pass Ratio : 100%
Generally Dynamic RAM is used as main memory in a computer system as it ____________
Consumes less power
Has higher speed
Has lower cell density
Needs refreshing circuitry
Explanation:
Because of higher speed it is Dynamic.
Question 10
Marks : +2 | -2
Pass Ratio : 100%
If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be __________
11 bits
21 bits
16 bits
20 bits
Explanation:
Each should be 8*2=16 bits.