Computer Organization

Address Translation

Question 1
Marks : +2 | -2
Pass Ratio : 100%
When the page table is placed in the main memory, the ___________ is used to store the recently accessed pages.
MMU
TLB
R0
Table
Explanation:
The TLB is used to store the page numbers of the recently accessed pages.
Question 2
Marks : +2 | -2
Pass Ratio : 100%
The virtual memory bridges the size and speed gap between __________ and __________
RAM and ROM
RAM and Secondary memory
Processor and RAM
None of the mentioned
Explanation:
The virtual memory basically works as an extension of the RAM.
Question 3
Marks : +2 | -2
Pass Ratio : 100%
The higher order bits of the virtual address generated by the processor forms the _______
Table number
Frame number
List number
Page number
Explanation:
The higher order bits indicate the page number which points to one particular entry in the page table.
Question 4
Marks : +2 | -2
Pass Ratio : 50%
For converting a virtual address into the physical address, the programs are divided into __________
Pages
Frames
Segments
Blocks
Explanation:
On the physical memory side the memory is divided into pages.
Question 5
Marks : +2 | -2
Pass Ratio : 100%
The TLB is incorporated as part of the _________
Processor
MMU
Disk
RAM
Explanation:
None.
Question 6
Marks : +2 | -2
Pass Ratio : 100%
The area in the main memory that can hold one page is called as ___________
Page entry
Page frame
Frame
Block
Explanation:
None.
Question 7
Marks : +2 | -2
Pass Ratio : 100%
The _______ bit is used to indicate the validity of the page.
Valid bit
Invalid bit
Correct bit
None of the mentioned
Explanation:
The os first validates the page and then only moves from the page table.
Question 8
Marks : +2 | -2
Pass Ratio : 100%
The bits used to indicate the status of the page in the memory is called ______
Control bits
Status bits
Progress bit
None of the mentioned
Explanation:
These bits are used to store the status information of the program.
Question 9
Marks : +2 | -2
Pass Ratio : 100%
The page table should be ideally situated within ____________
Processor
TLB
MMU
Cache
Explanation:
The page table information is used for every read and access operation.
Question 10
Marks : +2 | -2
Pass Ratio : 100%
The starting address of the page table is stored in __________
TLB
R0
Page table base register
None of the mentioned
Explanation:
The register is used to hold the address which is used to access the table.